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NVIDIA-Nemotron-Nano-9B-v2: GPU memory to fine-tune

Fine-tuning NVIDIA-Nemotron-Nano-9B-v2 at batch 1 and 2048 tokens takes about 183 GB of GPU memory for a full fine-tune (2 x H200 141 GB, split by layer), and 30.5 GB with LoRA r=16 on a bf16 base (borderline on one A100 40 GB). Estimated from the model's structure, reading the config under transformers semantics, not measured. What fits on which card.

Reconstructed from its own config.json with no weights read. 429K downloads on Hugging Face.

Our count against the checkpoint

The left number comes from the graph. The right one is the number of scalars in the published weight files. Nothing on this page was tuned to make them agree.

Derived from structure
8.89B
8,888,358,400 parameters
In the published checkpoint
8.89B
8,888,227,328 scalars · safetensors.total, read 2026-03-05
Delta
+0.00%

custom-code This repository ships its own modeling code (`auto_map`, e.g. `configuration_nemotron_h.py`), so `config.json` names a class in the repo rather than an architecture `transformers` defines. The graph below is what those config keys mean under `transformers` semantics, which is not necessarily what the repo's own file builds. A gap here is a statement about what we read, not about the checkpoint.

What it costs to run

Cost is a roofline estimate on the priced GPU for 10 epochs at batch 32, 2048 tokens over 50,000 samples (assumed; no dataset attached).

Layers
171
Will it forward-pass
Yes
Priced on
A10G (24GB)
Est. one run
$639.55

Memory: what fits on which card

Largest batch per card. Training is sized at 2048 tokens per sample, serving at 4096 tokens per sequence.

Full fine-tune, batch 1 at 2048 tokens
183 GB
LoRA r=16, batch 1 at 2048 tokens
30.5 GB
Serve: bf16 weights
17.8 GB
Serve: KV cache, 4096 tokens
67 MB
Serve: recurrent state
73 MB
CardFull fine-tuneLoRA r=16Serve bf16, 4096 tokens
T4 16 GBdoes not fit at batch 1does not fit at batch 1does not fit at batch 1
L4 24 GBdoes not fit at batch 1does not fit at batch 1batch 22
A100 40 GBdoes not fit at batch 1batch 1, borderlinebatch 121
A100 / H100 80 GBdoes not fit at batch 1batch 4batch 370
H200 141 GB2 cards at batch 1 (119 + 52 layers)batch 8batch 749

Training: 2048 tokens per sample (2048, or the model's context when shorter; the structure table is at the config's maximum, 131072), AdamW with bf16 autocast, SDPA attention (no score matrix stored), 1.15x headroom on every card. Full fine-tune holds weights, gradients and optimizer state (1.2 x 16 bytes per parameter) plus activations. LoRA is r=16 on every linear layer but the head, base frozen in bf16 (2 bytes per parameter), adapters at full AdamW state, same activations. A two-card split is a contiguous layer cut (pipeline parallel), computed only where one card cannot hold batch 1. "Borderline" means the card holds batch 1 on the estimate but not on the conservative peak (the estimate x 1.43, at or above the measured peak on 95% of held-out runs): measure one step before reserving it. Serving: bf16 weights plus the KV cache of 4096 tokens per sequence plus the fixed recurrent state of the SSM / linear-attention layers; prefill working set, CUDA context and framework reserve not counted.

These are estimates from the graph, not measurements. Against measured runs, held out by architecture, the estimate flagged 113 of the 131 jobs that did not fit their card and said "fits" on the other 18. Every measured run.

Structure

173 nodes. Output shapes are propagated from the input shape, batch dimension excluded, at 131072 tokens: the config's maximum context, not the 2048 the memory above is sized at.

LayerTypeOutput shape
1InputInput1 × 131072
2EmbeddingEmbedding1 × 131072 × 4480
3RMSNorm_1_1RMSNorm1 × 131072 × 4480
4Mamba_1Mamba-2 (SSD)1 × 131072 × 4480
5Add_1_attnAdd1 × 131072 × 4480
6RMSNorm_2_2RMSNorm1 × 131072 × 4480
7FFN_2Feed Forward1 × 131072 × 4480
8Add_2_ffnAdd1 × 131072 × 4480
9RMSNorm_3_1RMSNorm1 × 131072 × 4480
10Mamba_3Mamba-2 (SSD)1 × 131072 × 4480
11Add_3_attnAdd1 × 131072 × 4480
12RMSNorm_4_2RMSNorm1 × 131072 × 4480
13FFN_4Feed Forward1 × 131072 × 4480
14Add_4_ffnAdd1 × 131072 × 4480
15RMSNorm_5_1RMSNorm1 × 131072 × 4480
16Mamba_5Mamba-2 (SSD)1 × 131072 × 4480
17Add_5_attnAdd1 × 131072 × 4480
18RMSNorm_6_2RMSNorm1 × 131072 × 4480
19FFN_6Feed Forward1 × 131072 × 4480
20Add_6_ffnAdd1 × 131072 × 4480
21RMSNorm_7_1RMSNorm1 × 131072 × 4480
22Mamba_7Mamba-2 (SSD)1 × 131072 × 4480
23Add_7_attnAdd1 × 131072 × 4480
24RMSNorm_8_1RMSNorm1 × 131072 × 4480
25Mamba_8Mamba-2 (SSD)1 × 131072 × 4480
26Add_8_attnAdd1 × 131072 × 4480
27RMSNorm_9_2RMSNorm1 × 131072 × 4480
28FFN_9Feed Forward1 × 131072 × 4480
29Add_9_ffnAdd1 × 131072 × 4480
30RMSNorm_10_1RMSNorm1 × 131072 × 4480
31Mamba_10Mamba-2 (SSD)1 × 131072 × 4480
32Add_10_attnAdd1 × 131072 × 4480
33RMSNorm_11_2RMSNorm1 × 131072 × 4480
34FFN_11Feed Forward1 × 131072 × 4480
35Add_11_ffnAdd1 × 131072 × 4480
36RMSNorm_12_1RMSNorm1 × 131072 × 4480
37Mamba_12Mamba-2 (SSD)1 × 131072 × 4480
38Add_12_attnAdd1 × 131072 × 4480
39RMSNorm_13_2RMSNorm1 × 131072 × 4480
40FFN_13Feed Forward1 × 131072 × 4480
41Add_13_ffnAdd1 × 131072 × 4480
42RMSNorm_14_1RMSNorm1 × 131072 × 4480
43Mamba_14Mamba-2 (SSD)1 × 131072 × 4480
44Add_14_attnAdd1 × 131072 × 4480
45RMSNorm_15_1RMSNorm1 × 131072 × 4480
46Attention_15Grouped Query Attn1 × 131072 × 4480
47Add_15_attnAdd1 × 131072 × 4480
48RMSNorm_16_2RMSNorm1 × 131072 × 4480
49FFN_16Feed Forward1 × 131072 × 4480
50Add_16_ffnAdd1 × 131072 × 4480
51RMSNorm_17_1RMSNorm1 × 131072 × 4480
52Mamba_17Mamba-2 (SSD)1 × 131072 × 4480
53Add_17_attnAdd1 × 131072 × 4480
54RMSNorm_18_2RMSNorm1 × 131072 × 4480
55FFN_18Feed Forward1 × 131072 × 4480
56Add_18_ffnAdd1 × 131072 × 4480
57RMSNorm_19_1RMSNorm1 × 131072 × 4480
58Mamba_19Mamba-2 (SSD)1 × 131072 × 4480
59Add_19_attnAdd1 × 131072 × 4480
60RMSNorm_20_2RMSNorm1 × 131072 × 4480
61FFN_20Feed Forward1 × 131072 × 4480
62Add_20_ffnAdd1 × 131072 × 4480
63RMSNorm_21_1RMSNorm1 × 131072 × 4480
64Mamba_21Mamba-2 (SSD)1 × 131072 × 4480
65Add_21_attnAdd1 × 131072 × 4480
66RMSNorm_22_1RMSNorm1 × 131072 × 4480
67Attention_22Grouped Query Attn1 × 131072 × 4480
68Add_22_attnAdd1 × 131072 × 4480
69RMSNorm_23_2RMSNorm1 × 131072 × 4480
70FFN_23Feed Forward1 × 131072 × 4480
71Add_23_ffnAdd1 × 131072 × 4480
72RMSNorm_24_1RMSNorm1 × 131072 × 4480
73Mamba_24Mamba-2 (SSD)1 × 131072 × 4480
74Add_24_attnAdd1 × 131072 × 4480
75RMSNorm_25_2RMSNorm1 × 131072 × 4480
76FFN_25Feed Forward1 × 131072 × 4480
77Add_25_ffnAdd1 × 131072 × 4480
78RMSNorm_26_1RMSNorm1 × 131072 × 4480
79Mamba_26Mamba-2 (SSD)1 × 131072 × 4480
80Add_26_attnAdd1 × 131072 × 4480
81RMSNorm_27_2RMSNorm1 × 131072 × 4480
82FFN_27Feed Forward1 × 131072 × 4480
83Add_27_ffnAdd1 × 131072 × 4480
84RMSNorm_28_1RMSNorm1 × 131072 × 4480
85Mamba_28Mamba-2 (SSD)1 × 131072 × 4480
86Add_28_attnAdd1 × 131072 × 4480
87RMSNorm_29_2RMSNorm1 × 131072 × 4480
88FFN_29Feed Forward1 × 131072 × 4480
89Add_29_ffnAdd1 × 131072 × 4480
90RMSNorm_30_1RMSNorm1 × 131072 × 4480
91Mamba_30Mamba-2 (SSD)1 × 131072 × 4480
92Add_30_attnAdd1 × 131072 × 4480
93RMSNorm_31_1RMSNorm1 × 131072 × 4480
94Attention_31Grouped Query Attn1 × 131072 × 4480
95Add_31_attnAdd1 × 131072 × 4480
96RMSNorm_32_2RMSNorm1 × 131072 × 4480
97FFN_32Feed Forward1 × 131072 × 4480
98Add_32_ffnAdd1 × 131072 × 4480
99RMSNorm_33_1RMSNorm1 × 131072 × 4480
100Mamba_33Mamba-2 (SSD)1 × 131072 × 4480
101Add_33_attnAdd1 × 131072 × 4480
102RMSNorm_34_2RMSNorm1 × 131072 × 4480
103FFN_34Feed Forward1 × 131072 × 4480
104Add_34_ffnAdd1 × 131072 × 4480
105RMSNorm_35_1RMSNorm1 × 131072 × 4480
106Mamba_35Mamba-2 (SSD)1 × 131072 × 4480
107Add_35_attnAdd1 × 131072 × 4480
108RMSNorm_36_2RMSNorm1 × 131072 × 4480
109FFN_36Feed Forward1 × 131072 × 4480
110Add_36_ffnAdd1 × 131072 × 4480
111RMSNorm_37_1RMSNorm1 × 131072 × 4480
112Mamba_37Mamba-2 (SSD)1 × 131072 × 4480
113Add_37_attnAdd1 × 131072 × 4480
114RMSNorm_38_2RMSNorm1 × 131072 × 4480
115FFN_38Feed Forward1 × 131072 × 4480
116Add_38_ffnAdd1 × 131072 × 4480
117RMSNorm_39_1RMSNorm1 × 131072 × 4480
118Mamba_39Mamba-2 (SSD)1 × 131072 × 4480
119Add_39_attnAdd1 × 131072 × 4480
120RMSNorm_40_1RMSNorm1 × 131072 × 4480
121Attention_40Grouped Query Attn1 × 131072 × 4480
122Add_40_attnAdd1 × 131072 × 4480
123RMSNorm_41_2RMSNorm1 × 131072 × 4480
124FFN_41Feed Forward1 × 131072 × 4480
125Add_41_ffnAdd1 × 131072 × 4480
126RMSNorm_42_1RMSNorm1 × 131072 × 4480
127Mamba_42Mamba-2 (SSD)1 × 131072 × 4480
128Add_42_attnAdd1 × 131072 × 4480
129RMSNorm_43_2RMSNorm1 × 131072 × 4480
130FFN_43Feed Forward1 × 131072 × 4480
131Add_43_ffnAdd1 × 131072 × 4480
132RMSNorm_44_1RMSNorm1 × 131072 × 4480
133Mamba_44Mamba-2 (SSD)1 × 131072 × 4480
134Add_44_attnAdd1 × 131072 × 4480
135RMSNorm_45_1RMSNorm1 × 131072 × 4480
136Mamba_45Mamba-2 (SSD)1 × 131072 × 4480
137Add_45_attnAdd1 × 131072 × 4480
138RMSNorm_46_2RMSNorm1 × 131072 × 4480
139FFN_46Feed Forward1 × 131072 × 4480
140Add_46_ffnAdd1 × 131072 × 4480
141RMSNorm_47_1RMSNorm1 × 131072 × 4480
142Mamba_47Mamba-2 (SSD)1 × 131072 × 4480
143Add_47_attnAdd1 × 131072 × 4480
144RMSNorm_48_2RMSNorm1 × 131072 × 4480
145FFN_48Feed Forward1 × 131072 × 4480
146Add_48_ffnAdd1 × 131072 × 4480
147RMSNorm_49_1RMSNorm1 × 131072 × 4480
148Mamba_49Mamba-2 (SSD)1 × 131072 × 4480
149Add_49_attnAdd1 × 131072 × 4480
150RMSNorm_50_2RMSNorm1 × 131072 × 4480
151FFN_50Feed Forward1 × 131072 × 4480
152Add_50_ffnAdd1 × 131072 × 4480
153RMSNorm_51_1RMSNorm1 × 131072 × 4480
154Mamba_51Mamba-2 (SSD)1 × 131072 × 4480
155Add_51_attnAdd1 × 131072 × 4480
156RMSNorm_52_2RMSNorm1 × 131072 × 4480
157FFN_52Feed Forward1 × 131072 × 4480
158Add_52_ffnAdd1 × 131072 × 4480
159RMSNorm_53_1RMSNorm1 × 131072 × 4480
160Mamba_53Mamba-2 (SSD)1 × 131072 × 4480
161Add_53_attnAdd1 × 131072 × 4480
162RMSNorm_54_2RMSNorm1 × 131072 × 4480
163FFN_54Feed Forward1 × 131072 × 4480
164Add_54_ffnAdd1 × 131072 × 4480
165RMSNorm_55_1RMSNorm1 × 131072 × 4480
166Mamba_55Mamba-2 (SSD)1 × 131072 × 4480
167Add_55_attnAdd1 × 131072 × 4480
168RMSNorm_56_2RMSNorm1 × 131072 × 4480
169FFN_56Feed Forward1 × 131072 × 4480
170Add_56_ffnAdd1 × 131072 × 4480
171Final_RMSNormRMSNorm1 × 131072 × 4480
172LM_HeadLinear1 × 131072 × 131072
173OutputOutput1 × 131072 × 131072

What the verifier says

warn4 attention layer(s) present but no positional encoding found. Attention is permutation-invariant, without position information the model cannot distinguish token order. Fix: Add a PositionalEncoding (sinusoidal) or RoPE layer before the first attention layer.
attention-no-pe

What changed upstream

The change tracker follows nvidia/NVIDIA-Nemotron-Nano-9B-v2: every revision it has read, what changed in the config, tokenizer, chat template or weights between them, and an OSV advisory per change.

Do this to your own model

Same numbers, on a model in your repo, in one command. No account.

pip install neurarch-trace
neurarch-trace nvidia/NVIDIA-Nemotron-Nano-9B-v2 --plan --share

Other nemotron_h checkpoints

NVIDIA-Nemotron-3-Nano-30B-A3B-BF16
31.58B derived · +0.00% against the checkpoint
NVIDIA-Nemotron-3-Nano-30B-A3B-FP8
31.58B derived · +0.00% against the checkpoint
NVIDIA-Nemotron-3-Nano-30B-A3B-NVFP4
31.58B derived · +73.1% against the checkpoint
NVIDIA-Nemotron-3-Super-120B-A12B-BF16
124B derived · +0.00% against the checkpoint